AD8553

FEATURES

Low offset voltage: 20 μV max

Low input offset drift: 0.1 μV/°C max High CMR: 120 dB min @ G = 100

Low noise: 0.7 μV p-p from 0.01 Hz to 10 Hz Wide gain range: 0.1 to 10,000

Single-supply operation: 1.8 V to 5.5 V Rail-to-rail output Shutdown capability

APPLICATIONS

Strain gauge Weigh scales Pressure sensors

Laser diode control loops Portable medical instruments Thermocouple amplifiers

GENERAL DESCRIPTION

The AD85531 is a precision instrumentation amplifier featuring low noise, rail-to-rail output and a power-saving shutdown mode. The AD8553 also features low offset voltage and drift coupled with high common-mode rejection. In shutdown mode, the total supply current is reduced to less than 4 μA. The AD8553 is capable of operating from 1.8 V to 5.5 V. With a low offset voltage of 20 μV, an offset voltage drift of 0.1 μV/°C, and a voltage noise of only 0.7 μV p-p (0.01 Hz to 10 Hz), the AD8553 is ideal for applications where error sources cannot be tolerated. Precision instrumentation, position and pressure sensors, medical instrumentation, and strain gauge amplifiers benefit from the low noise, low input bias current, and high common-mode rejection. The small footprint and low cost are ideal for high volume applications.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

1.8 V to 5 V Auto-Zero, In-Amp

with Shutdown

AD8553

PIN CONFIGURATION

RGA110RGBVINP2AD85539VINNVCC3TOP VIEW8GNDVO4(Not to Scale)7VREF100-VFB56ENABLE47450

Figure 1. 10-Lead MSOP

The small package and low power consumption allow maximum channel density and minimum board size for space-critical equipment and portable systems.

The AD8553 is specified over the industrial temperature range from −40°C to +85°C. The AD8553 is available in a Pb-free, 10-lead MSOP.

1

Patent pending.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.

AD8553

Gain Selection (Gain-Setting Resistors)..................................12 Reference Connection...............................................................12 Disable Function........................................................................12 Output Filtering..........................................................................12 Clock Feedthrough.....................................................................12 Low Impedance Output.............................................................12 Maximizing Performance Through Proper Layout...............13 Power Supply Bypassing............................................................13 Input Overvoltage Protection...................................................13 Capacitive Load Drive...............................................................13 Circuit Diagrams/Connections................................................14 Outline Dimensions.......................................................................18 Ordering Guide...............................................................................18

TABLE OF CONTENTS

Features..............................................................................................1 Applications.......................................................................................1 Pin Configuration.............................................................................1 General Description.........................................................................1 Revision History...............................................................................2 Specifications.....................................................................................3 Electrical Characteristics.............................................................3 Absolute Maximum Ratings............................................................5 Thermal Resistance......................................................................5 ESD Caution..................................................................................5 Typical Performance Characteristics.............................................6 Theory of Operation......................................................................11 High PSR and CMR...................................................................11 1/f Noise Correction..................................................................11 Applications.....................................................................................12

REVISION HISTORY

10/05—Revision 0: Initial Version

Rev. 0 | Page 2 of 20

AD8553

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VCC = 5.0 V, VCM = 2.5 V, VREF = VCC/2, VIN = VINP − VINN, RLOAD = 10 kΩ, TA = 25°C, G = 100, unless specified. See Table 5 for gain setting resistor values. Temperature specifications guaranteed by characterization. Table 1.

Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOSG = 1000 4 20 μV G = 100 4 20 μV G = 10 15 50 μV G = 1 120 375 μV vs. Temperature ΔVOS/ΔT G = 1000, −40°C ≤ TA ≤ +85°C 0.02 0.1 μV/°C G = 100, −40°C ≤ TA ≤ +85°C 0.02 0.1 μV/°C G = 10, −40°C ≤ TA ≤ +85°C 0.1 0.3 μV/°C G = 1, −40°C ≤ TA ≤ +85°C 1 3 μV/°C Input Bias Current IB 0.4 1 nA −40°C ≤ TA ≤ +85°C 2 nA MInput Offset Current IOS 2 nA VREF Pin Current IREF 0.01 1 nA Input Operating Impedance Differential 50||1 Ω||pF Common Mode 10||10 GΩ||pF Input Voltage Range 0 3.3 V Common-Mode Rejection CMR G = 100, VCM = 0 V to 3.3 V, −40°C ≤ TA ≤ +85°C 120 140 dB G = 10, VCM = 0 V to 3.3 V, −40°C ≤ TA ≤ +85°C 100 120 dB Gain Error G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V 0.10 0.3 % G = 10, VCM = 121.25 mV , VO = 0.075 V to 4.925 V 0.15 0.4 % Gain Drift G = 10, 100, 1000, −40°C ≤ TA ≤ +85°C 5 25 ppm/°C G = 1, −40°C ≤ TA ≤ +85°C 30 50 ppm/°C Nonlinearity G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V 0.001 0.003 % FS G = 10, VCM = 121.25 mV, VO = 0.075 V to 4.925 V 0.040 0.060 % FS VREF Range 0.8 4.2 V OUTPUT CHARACTERISITICS Output Voltage High VOH 4.925 V Output Voltage Low VOL 0.075 V Short-Circuit Current ISC ±35 mA POWER SUPPLY Power Supply Rejection PSR G = 100, VS = 1.8 V to 5.5 V, VCM = 0 V 100 120 dB G = 10, VS = 1.8 V to 5.5 V, VCM = 0 V 90 110 dB Supply Current ISYIO = 0 mA, VIN = 0 V 1.1 1.3 mA −40°C ≤ TA ≤ +85°C 1.5 mA Supply Current Shutdown Mode ISD 2 4 μA ENABLE INPUTS Logic High Voltage 2.40 V Logic Low Voltage 0.80 V NOISE PERFORMANCE Voltage Noise en p-p f = 0.01 Hz to 10 Hz 0.7 μV p-p Voltage Noise Density enG = 100, f = 1 kHz 30 nV/√Hz G = 10, f = 1 kHz 150 nV/√Hz Internal Clock Frequency 60 kHz

1

Signal Bandwidth G = 1 to 1000 1 kHz

1

Higher bandwidths result in higher noise.

Rev. 0 | Page 3 of 20

AD8553

VS = 1.8 V, VCM = -0 V, VREF = VS/2, VIN = VINP − VINN, RLOAD = 10 kΩ, TA = 25°C, G = 100, unless specified. See Table 5 for gain setting resistor values. Temperature specifications guaranteed by characterization. Table 2.

Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage VOSG = 1000 3 20 μV G = 100 3 20 μV G = 10 14 50 μV G = 1 130 375 μV Vs. Temperature ΔVOS/ΔT G = 1000, −40°C ≤ TA ≤ +85°C 0.02 0.25 μV/°C G = 100, −40°C ≤ TA ≤ +85°C 0.02 0.25 μV/°C G = 10, −40°C ≤ TA ≤ +85°C 0.1 3 μV/°C G = 1, −40°C ≤ TA ≤ +85°C 1 10 μV/°C Input Bias Current IB 0.05 1 nA −40°C ≤ TA ≤ +85°C 2 nA Input Offset Current IOS 2 nA VREF Pin Current IREF 0.02 1 nA Input Operating Impedance MDifferential 50||1 Ω||pF Common Mode 10||10 GΩ||pF Input Voltage Range 0 0.15 V Common-Mode Rejection CMR G = 100, VCM = 0 V to 0.15 V, −40°C ≤ TA ≤ +85°C 100 110 dB G = 10, VCM = 0 V to 0.15 V, −40°C ≤ TA ≤ +85°C 90 110 dB Gain Error G = 100, VCM =4.125 mV, VO = 0.075 V to 1.725 V 0.2 0.4 % G = 10, VCM = 41.25 mV, VO = 0.075 V to 1.725 V 0.2 0.4 % Gain Drift G = 10, 100, 1000, −40°C ≤ TA ≤ +85°C 25 ppm/°C G = 1, −40°C ≤ TA ≤ +85°C 50 ppm/°C Nonlinearity G = 100, VCM = 4.125 mV, VO = 0.075 V to 1.725 V 0.003 % FS G = 10, VCM = 41.25 mV, VO = 0.075 V to 1.725 V 0.010 % FS VREF Range 0.8 1.0 V OUTPUT CHARACTERISITICS Output Voltage High VOH 1.725 V Output Voltage Low VOL 0.075 V Short-Circuit Current ISC ±5 mA POWER SUPPLY Power Supply Rejection PSR G = 100, VS = 1.8 V to 5.5 V, VCM = 0 V 100 120 dB Supply Current ISYIO = 0 mA, VIN = 0 V 0.8 1.2 mA −40°C ≤ TA ≤ +85°C 1.4 mA Supply Current Shutdown Mode ISD 2 4 μA ENABLE INPUTS Logic High Voltage 1.4 V Logic Low Voltage 0.5 V NOISE PERFORMANCE Voltage Noise en p-p f = 0.01 Hz to 10 Hz 0.7 μV p-p Voltage Noise Density enG = 100, f = 1 kHz 30 nV/√Hz G = 10, f = 1 kHz 150 nV/√Hz Internal Clock Frequency 60 kHz Signal Bandwidth1 G = 1 to 1000 1 kHz

1

Higher bandwidths result in higher noise.

Rev. 0 | Page 4 of 20

AD8553

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Ratings may cause permanent damage to the device. This is a stress Supply Voltage 6 V rating only; functional operation of the device at these or any Input Voltage +VSUPPLYother conditions above those indicated in the operational

1

Differential Input Voltage±VSUPPLYsection of this specification is not implied. Exposure to absolute Output Short-Circuit Duration to GND Indefinite maximum rating conditions for extended periods may affect Storage Temperature Range (RM Package) −65°C to +150°C device reliability. Operating Temperature Range −40°C to +85°C

THERMAL RESISTANCE Junction Temperature Range (RM Package) −65°C to +150°C

Lead Temperature Range (Soldering, 10 sec) 300°C θ JA is specified for the worst-case conditions, that is, a device

1

Stresses above those listed under Absolute Maximum Ratings

Differential input voltage is limited to ±5.0 V, the supply voltage, or whichever is less.

soldered in a circuit board for surface-mount packages. Table 4.

Package Type 10-Lead MSOP (RM)

1

θJA1110

θJC32.2

Unit °C/W

θJA is specified for the nominal conditions, that is, θJA is specified for the device soldered on a circuit board.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Rev. 0 | Page 5 of 20

AD8553

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, G = 100, unless specified, see Table 5 for gain setting resistor values. Filters as noted are the combination of R2/C2 and R3/C3 as in Figure 31.

80GAIN = 100060GAIN = 10040VCC = 1.8VAND 5VFILTER = 1kHz80GAIN = 1000VCC = 1.8VAND 5VFILTER = 10kHz6040GAIN (dB)GAIN = 100GAIN (dB)GAIN = 1020GAIN = 120GAIN = 1000GAIN = 1–20074-002–20074-003–40101001kFREQUENCY (Hz)10k100k–40101001kFREQUENCY (Hz)10k100k

Figure 2. Gain vs. Frequency

180160140120VCC = 5VFILTER = 1kHzGAIN = 100GAIN = 10Figure 5. Gain vs. Frequency

180160140120CMR (dB)VCC = 5VFILTER = 10kHzGAIN = 100GAIN = 10GAIN = 1CMR (dB)GAIN = 11008060074-0041008060074-00020104020101001kFREQUENCY (Hz)10k100k1001kFREQUENCY (Hz)10k100k

Figure 3. Common-Mode Rejection (CMR) vs. Frequency

160GAIN=100140120100GAIN=10NOISE (nV/√Hz)Figure 6. Common-Mode Rejection (CMR) vs. Frequency

10kGAIN=11kGAIN=10100GAIN=100,1000GAIN=1PSR (dB)806040074-00610074-007201010FILTER=10kHzFILTER=1kHz1001kFREQUENCY(Hz)VCC=5VAND1.8V10k100k10.010.11101001k10k100k

FREQUENCY(Hz)

Figure 4. Power Supply Rejection vs. Frequency

Figure 7. Voltage Noise Density

Rev. 0 | Page 6 of 20

VCC=5VTURN ONTIME=10µsGAIN=100FILTER=1kHz8070AD8553

GAIN=100FILTER=10kHzINPUT OFFSET VOLTAGE (µV)6050403020100074-00920µV/DIVFILTERSETTLINGVCC=5VVCC=1.8VFILTERSETTLINGVCC=5VTURN ONTIME=15µsVCC=1.8V–0.100.10.20.30.40.50.60.70.8TIME(ms)074-008–10–20VCC=1.8V0.9050100150200250300350

TIME(µs)

Figure 8. Input Offset Voltage vs. Turn-On Time

VCC=5V, G=1,10,100,1000VCC=1.8V, G=1,10,100,1000Figure 11. Input Offset Voltage vs. Turn-On Time

VCC = 5V, G = 1, 10, 100, 100010kHz FILTER50mV/DIV10kHzFILTER 1V/DIV1kHz FILTER074-0101kHzFILTER500µs/DIV

500µs/DIV074-011Figure 9. Small Signal Step Response

VCC=5VGAIN=100,1000

Figure 12. Large Signal Step Response

VCC=5VGAIN=100,1000POPULATION074-017POPULATION02468101214161820

074-01400.010.020.030.040.050.060.070.080.090.10

Figure 10. Input Offset Voltage (μV)

Figure 13. Input Offset Voltage Drift (μV/°C)

Rev. 0 | Page 7 of 20

AD8553

VCC = 5VGAIN = 10NNOOIITATALLUUPOPPOP610-4745005.010.015.020.025.030.035.040.045.050.0

Figure 14. Input Offset Voltage (μV)

VGAIN = 1CC = 5VNNOOIITAATLLUUPPOOPP510-47450–50–103070110150190230270310350

Figure 15. Input Offset Voltage (μV)

VCC = 5VGAIN = 100VCM = 12.125mVNNOOIITTAALLUUPPOOPP020-47450–250–225–200–175–150–125–100–75–50–250

Figure 16. Gain Error (m%)

Rev. 0 | Page 8 of 20

VCC = 5VGAIN = 10310-4745000.030.060.090.120.150.180.210.240.270.30

Figure 17. Input Offset Voltage Drift (μV/°C)

VGAIN = 1CC = 5V210-4745000.300.600.901.201.501.802.102.402.703.00

Figure 18. Input Offset Voltage Drift (μV/°C)

VCC = 5VGAIN = 100VCM = 12.125mV910-4745000.30.60.91.21.51.82.12.42.73.0

Figure 19. Nonlinearity (m%)

180160140120VCC = 1.8VFILTER = 1kHzGAIN = 100GAIN = 10140120180160VCC = 1.8VFILTER = 10kHzGAIN = 100GAIN = 10GAIN = 11008060074-021AD8553

CMR (dB)1008060402010CMR (dB)GAIN = 11001kFREQUENCY (Hz)10k100k20101001kFREQUENCY (Hz)10k100k

074-02240

Figure 20. Common-Mode Rejection (CMR) vs. Frequency

VCC=1.8VGAIN=100,1000Figure 23. Common-Mode Rejection (CMR) vs. Frequency

VCC = 1.8VGAIN = 100, 1000POPULATION074-025POPULATION–202468101214161820

00.010.020.030.040.050.060.070.080.090.10074-028

Figure 21. Input Offset Voltage (μV)

VCC = 1.8VGAIN = 10Figure 24. Input Offset Voltage Drift (μV/°C)

VCC = 1.8VGAIN = 10074-024POPULATIONPOPULATION0369121518212427303336394248515760

00.030.060.090.120.150.180.210.240.270.30074-027

Figure 22. Input Offset Voltage (μV)

Figure 25. Input Offset Voltage Drift (μV/°C)

Rev. 0 | Page 9 of 20

AD8553

VCC = 1.8VGAIN = 1VCC = 1.8VGAIN = 1

POPULATIONPOPULATION04080120160200240280320360074-023

00.40.81.21.62.02.42.83.23..04.44.8074-033

Figure 26. Input Offset Voltage (μV)

VCC = 5.0VGAIN = 100Figure 28. Input Offset Voltage Drift (μV/°C)

VCC=1.8V,G=10,100,100010kHzFILTER500mV/DIV200nV/DIV1kHzFILTER074-03610SEC/DIV

500µs/DIV074-029

Figure 27. 0.01 Hz to 10 Hz Voltage Noise

Figure 29. Large Signal Step Response

Rev. 0 | Page 10 of 20

AD8553

HIGH PSR AND CMR

Common-mode rejection and power supply rejection indicate the amount that the offset voltage of an amplifier changes when its common-mode input voltage or power supply voltage changes. The autocorrection architecture of the AD8553 continuously corrects for offset errors, including those induced by changes in input or supply voltage, resulting in exceptional rejection performance. The continuous autocorrection provides great CMR and PSR performances over the entire operating temperature range (−40°C to +85°C).

The parasitic resistance in series with R2 does not degrade

CMR but causes a small gain error and a very small offset error. Therefore, an external buffer amplifier is not required to drive the VREF pin to maintain excellent CMR performance. This helps reduce system costs over conventional instrumentation amplifiers.

THEORY OF OPERATION

The AD8553 is a precision current-mode correction

instrumentation amplifier capable of single-supply operation. The current-mode correction topology results in excellent accuracy without the need for trimmed resistors on the die. Figure 30 shows a simplified diagram illustrating the basic operation of the AD8553 (without correction). The circuit consists of a voltage-to-current amplifier (M1 to M6), followed by a current-to-voltage amplifier (R2 and A1). Application of a differential input voltage forces a current through External Resistor R1, resulting in conversion of the input voltage to a signal current. Transistor M3 to Transistor M6 transfer twice this signal current to the inverting input of the op amp A1. Amplifier A1 and External Resistor R2 form a current-to-voltage converter to produce a rail-to-rail output voltage at VOUT.

Op amp A1 is a high precision auto-zero amplifier. This amplifier preserves the performance of the autocorrecting, current-mode amplifier topology while offering the user a true voltage-in, voltage-out instrumentation amplifier. Offset errors are corrected internally.

An external reference voltage is applied to the noninverting input of A1 to set the output reference level. External Capacitor C2 is used to filter out correction noise.

The pinout of the AD8553 allows the user to access the signal current from the output of the voltage-to-current converter (Pin 5). The user can choose to use the AD8553 as a current-output device instead of a voltage-output device. See Figure 35 for circuit connections.

1/f NOISE CORRECTION

Flicker noise, also known as 1/f noise, is noise inherent in the physics of semiconductor devices and decreases 10 dB per decade. The 1/f corner frequency of an amplifier is the frequency at which the flicker noise is equal to the broadband noise of the amplifier. At lower frequencies, flicker noise dominates causing large errors in low frequency or dc applications.

Flicker noise is seen effectively as a slowly varying offset error, which is reduced by the autocorrection topology of the AD8553. This allows the AD8553 to have lower noise near dc than standard low noise instrumentation amplifiers.

Rev. 0 | Page 11 of 20

AD8553

DISABLE FUNCTION

APPLICATIONS

GAIN SELECTION (GAIN-SETTING RESISTORS)

The gain of the AD8553 is set according to

The AD8553 provides a shutdown function to conserve power when the device is not needed. Although there is a 1 μA pull-up G = 2 × (R2/R1) (1)

current on the ENABLE pin, Pin 6 should be connected to the

Table 5 lists the recommended resistor values. Resistor R1 must positive supply for normal operation and to the negative supply be at least 3.92 kΩ for proper operation. Use of resistors larger to turn the device off. It is not recommended to leave Pin 6 than the recommended values results in higher offset and floating. higher noise.

Turn-on time upon switching Pin 6 high is dominated by the

Gain accuracy depends on the matching of R1 and R2. Any output filters. When the device is disabled, the output becomes mismatch in resistor values results in a gain error. Resistor high impedance enabling muxing application of multiple value errors due to drift affect gain by the amount indicated by AD8553 instrumentation amplifiers. Equation 1. However, due to the current-mode operation of the

OUTPUT FILTERING AD8553, a mismatch in R1 and R2 does not degrade the CMR.

Filter Capacitor C2 is required to limit the amount of switching

Care should be taken when selecting and positioning the gain noise present at the output. The recommended bandwidth of setting resistors. The resistors should be made of the same the filter created by C2 and R2 is 1.4 kHz. The user should first material and package style. Surface-mount resistors are select R1 and R2 based on the desired gain, then select C2 based on recommended. They should be positioned as close together

C2 = 1/(1400 × 2 × π × R2) (2) as possible to minimize TC errors.

To maintain good CMR vs. frequency, the parasitic capacitance

on the R1 gain setting pins should be minimized and matched. This also helps maintain a low gain error at G < 10. If resistor trimming is required to set a precise gain, trim Resistor R2 only. Using a potentiometer for R1 degrades the amplifier’s performance.

Addition of another single-pole RC filter of 1.4 kHz on the output (R3 and C3 in Figure 31 to Figure 33) is required for bandwidths greater than 10 Hz. These two filters produce an overall bandwidth of 1 kHz.

When driving an ADC, the recommended values for the second filter are R3 = 100 Ω and C3 = 1 μF. This filter is required to achieve the specified performance. It also acts as an antialiasing filter for the ADC. If a sampling ADC is not being driven, the value of the capacitor can be reduced, but the filter frequency should remain unchanged.

For applications with low bandwidths (<10 Hz), only the first filter is required. In this case, the high frequency noise from the auto-zero amplifier (output amplifier) is not filtered before the following stage.

REFERENCE CONNECTION

Unlike traditional three op amp instrumentation amplifiers, parasitic resistance in series with VREF (Pin 7) does not degrade CMR performance. This allows the AD8553 to attain its extremely high CMR performance without the use of an external buffer amplifier to drive the VREF pin, which is required by industry-standard instrumentation amplifiers. This helps save valuable printed circuit board space and minimizes system costs. For optimal performance in single-supply applications, VREF should be set with a low noise precision voltage reference. However, for a lower system cost, the reference voltage can be set with a simple resistor voltage divider between the supply and ground (see Figure 31). This configuration results in degraded output offset performance if the resistors deviate from their ideal values. In dual-supply applications, VREF can simply be connected to ground.

The VREF pin current is approximately 20 pA, and as a result, an external buffer is not required.

CLOCK FEEDTHROUGH

The AD8553 uses two synchronized clocks to perform the autocorrection. The input voltage-to-current amplifiers are corrected at 60 kHz.

Trace amounts of these clock frequencies can be observed at the output. The amount of feedthrough is dependent upon the gain, because the autocorrection noise has an input and output referred term. The correction feedthrough is also dependent upon the values of the external filters R2/C2, and R3/C3.

LOW IMPEDANCE OUTPUT

For applications where a low output impedance is required, the circuit in Figure 33 should be used. This provides the same filtering performance as shown in the configuration in Figure 34.

Rev. 0 | Page 12 of 20

AD8553

For single-supply operation, a 0.1 μF surface-mount capacitor should be connected from the supply line to ground. All bypass capacitors should be positioned as close to the DUT supply pins as possible, especially the bypass capacitor between the supplies. Placement of the bypass capacitor on the back of the board directly under the DUT is preferred.

MAXIMIZING PERFORMANCE THROUGH PROPER LAYOUT

To achieve the maximum performance of the AD8553, care should be taken in the circuit board layout. The PC board

surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board reduces surface moisture and provides a humidity barrier, reducing parasitic resistance on the board.

Care must be taken to minimize parasitic capacitance on Pin 1 and Pin 10 (Resistor R1 connections). Traces from Pin 1 and Pin 10 to R1 should be kept short and symmetric. Excessive capacitance on these pins will result in a gain error. This effect is most prominent at low gains (G < 10).

For high impedance sources, the PC board traces from the AD8553 inputs should be kept to a minimum to reduce input bias current errors.

INPUT OVERVOLTAGE PROTECTION

All terminals of the AD8553 are protected against ESD. In the case of a dc overload voltage beyond either supply, a large

current would flow directly through the ESD protection diodes. If such a condition should occur, an external resistor should be used in series with the inputs to limit current for voltages

beyond the supply rails. The AD8553 can safely handle 5 mA of continuous current, resulting in an external resistor selection of REXT = (VIN − VS)/5 mA.

POWER SUPPLY BYPASSING

The AD8553 uses internally generated clock signals to perform the autocorrection. As a result, proper bypassing is necessary to achieve optimum performance. Inadequate or improper bypassing of the supply lines can lead to excessive noise and offset voltage. A 0.1 μF surface-mount capacitor should be connected between the supply lines. This capacitor is necessary to minimize ripple from the correction clocks inside the IC. For dual-supply operation (see Figure 33), a 0.1 μF (ceramic) surface-mount capacitor should be connected from each supply pin to ground.

VCCCAPACITIVE LOAD DRIVE

The output buffer, Pin 4, can drive capacitive loads up to 100 pF.

C2IR1I – IR1(VINP – VINN)R1M2VINNM3M4IM5M6I – IR1I + IR1VBIASVREFA12IR1VOUT = VREFR2+2R2R2VINP – VINNIR1 =VINPM12I2I074-030EXTERNAL

Figure 30. Simplified AD8553 Schematic

Rev. 0 | Page 13 of 20

AD8553

CIRCUIT DIAGRAMS/CONNECTIONS

VS+0.1µFGND236VIN++1R110VIN––78AD85535R2C2GND100kΩVS+100kΩ0.1µF4R3100ΩC31µFGNDVOUT9R3ANDC3VALUESARERECOMMENDEDTODRIVEANA/DCONVERTERGND074-032

Figure 31. Single-Supply Connection Diagram Using Voltage Divider Reference

VS+0.1µFGNDVS–0.1µFVIN+2+361R110VIN––78AD85535R2C20.1µFGNDVS–4R3100ΩC31µFGNDVOUT9R3ANDC3VALUESARERECOMMENDEDTODRIVEANA/DCONVERTER074-031

Figure 32. Dual-Supply Connection Diagram

Rev. 0 | Page 14 of 20

AD8553

VS+

0.1µFGNDVS–0.1µFVIN+2+361R110VIN––78GND0.1µFGNDVS–AD8553R3100ΩC31µFR2GNDVOUTC29074-034R3ANDC3VALUESARERECOMMENDEDTODRIVEANA/DCONVERTER

Figure 33. Dual-Supply Connection Diagram with Low Impedance Output

VS+0.1µFGND236VIN++1R110VIN––78AD85535R2C2VS–4R3100ΩC31µFGNDVOUT9R3ANDC3VALUESARERECOMMENDEDTODRIVEANA/DCONVERTER1.0µFVCC0.1µFVINGND074-035VOUTFigure 34. Dual-Supply Connection Diagram Using IC Voltage Reference

Rev. 0 | Page 15 of 20

AD8553

VS+213674R1109_NC(NOCONNECT)VIO=INR1AMMETER074-037

VIN+AD8553580.1µFVS–10kΩA

Figure 35. Voltage-to-Current Converter, 0 μA to 30 μA Source

VS+2+1374R1109_6VREF = 2.5V100ΩC258074-038AD8553A/DA/DCONVERTER1µFR2

Figure 36. Example of an AD8553 Driving a Converter at VS+ = 5 V

Rev. 0 | Page 16 of 20

AD8553

VS+LOGIC2+1374R1109_6VREFR3C258VS–VS+2+1374R6109_6VREFR8C358R7100Ω1µFVOUTR2100ΩAD8553AD8553VS+2+1374R11109_6VREFR13C458R12100Ω074-039AD8553

Figure 37. Multiplexed Output

Table 5. Recommended External Component Values for Selected Gains

Desired Gain (V/V) 1 2 5 10 50 100 500 1000

R1 (Ω) 200 k 100 k 40.2 k 20 k 4.02 k 3.92 k 3.92 k 3.92 k

R2 || C2 (Ω || F) 100 k || 1200p 100 k || 1200p 100 k || 1200p 100 k || 1200p 100 k || 1200p 196 k || 560p 976 k || 120p 1.96 M || 56p

Calculated Gain 1 2 4.975 10 49.75 100 497.95 1000

Rev. 0 | Page 17 of 20

AD8553

OUTLINE DIMENSIONS

3.103.002.903.103.002.90PIN 10.50 BSC0.950.850.750.150.050.330.17COPLANARITY0.10COMPLIANT TO JEDEC STANDARDS MO-187-BA1.10 MAX8°0°0.800.600.4010615.1.904.655SEATINGPLANE0.230.08

Figure 38. 10-Lead Mini Small Outline Package [MSOP]

(RM-10)

Dimensions shown in millimeters

ORDERING GUIDE

Model

AD8553ARMZ-R21AD8553ARMZ-REEL1

1

Temperature Range −40°C to +85°C −40°C to +85°C Package Description 10-Lead MSOP 10-Lead MSOP Package Option RM-10 RM-10 Branding A09 A09

Z = Pb-free part.

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AD8553

NOTES

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AD8553

NOTES

©2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D074-0-10/05(0)

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