LTC3412EFE#PBF资料

LTC34122.5A, 4MHz, MonolithicSynchronous Step-Down RegulatorDESCRIPTIO■■■■■■■■■■■■■■High Efficiency: Up to 95%2.5A Output CurrentLow Quiescent Current: 62μALow RDS(ON) Internal Switches: 85mΩProgrammable Frequency: 300kHz to 4MHzNo Schottky Diode Required±2% Output Voltage Accuracy0.8V Reference Allows Low Output VoltageSelectable Forced Continuous/Burst Mode Operationwith Adjustable Burst ClampSynchronizable Switching FrequencyLow Dropout Operation: 100% Duty CyclePower Good Output Voltage MonitorOvertemperature ProtectionAvailable in 16-Lead Thermally Enhanced TSSOPand QFN PackagesThe LTC®3412 is a high efficiency monolithic synchro-nous, step-down DC/DC converter utilizing a constantfrequency, current mode architecture. It operates from aninput voltage range of 2.625V to 5.5V and provides anadjustable regulated output voltage from 0.8V to 5V whiledelivering up to 2.5A of output current. The internalsynchronous power switch with 85mΩ on-resistanceincreases efficiency and eliminates the need for an exter-nal Schottky diode. Switching frequency is set by anexternal resistor or can be sychronized to an externalclock. 100% duty cycle provides low dropout operationextending battery life in portable systems. OPTI-LOOP®compensation allows the transient response to be opti-mized over a wide range of loads and output capacitors.The LTC3412 can be configured for either Burst Mode®operation or forced continuous operation. Forced con-tinuous operation reduces noise and RF interference whileBurst Mode operation provides high efficiency by reduc-ing gate charge losses at light loads. In Burst Modeoperation, external control of the burst clamp level allowsthe output voltage ripple to be adjusted according to therequirements of the application. To further maximizebattery life, the P-channel MOSFET is turned on continu-ously in dropout (100% duty cycle). , LT, LTC, LTM, Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.UAPPLICATIO S■■■■■■Portable InstrumentsBattery-Powered EquipmentNotebook ComputersDistributed Power SystemsCellular TelephonesDigital CamerasTYPICAL APPLICATIOVIN2.7V TO 5.5VSVINRT4.7M309kEfficiency vs Load Current22μFPVINPGOODSWLTC3412RUN/SS470pF15k1000pF100pFPGNDSGNDITHSYNC/MODEVFB110k75k392k3412 F01100VOUT2.5V2.5AEFFICIENCY (%)1μH100μF80Burst Mode OPERATION60FORCED CONTINUOUS4020VIN = 3.3VVOUT = 2.5V0.010.11LOAD CURRENT (A)103412 G0100.001Figure 1. 2.5V, 2.5A Step-Down RegulatorU3412fbFEATURESU1

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LTC3412ABSOLUTE AXIU RATIGS(Note 1)Input Supply Voltage...................................–0.3V to 6VITH, RUN, VFB Voltages...............................–0.3V to VINSYNC/MODE Voltages................................–0.3V to VINSW Voltage...................................–0.3V to (VIN + 0.3V)Peak SW Sink and Source Current.........................6.5AOperating TemperatureRange (Note 2).......................................–40°C to 85°CJunction Temperature (Note 5).............................125°CLead Temperature (Soldering, 10 sec)TSSOP..............................................................300°CWUPACKAGE/ORDER IFORATIOTOP VIEWTOP VIEWSVINPGOODITHVFBRTSYNC/MODERUN/SSSGND123456781716PVIN15SW14SW13PGND12PGND11SW10SW9PVINUSYNC/MODE16151413RUN/SS1SGND2PVIN3SW45SW6PGND7PGND8SW1712PGOOD11SVIN10PVIN9SWFE PACKAGE16-LEAD PLASTIC TSSOPEXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCBTJMAX = 125°C, θJA = 37.6°C/W, θJC = 10°C/WUF PACKAGE16-LEAD (4mm × 4mm) PLASTIC QFNEXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCBTJMAX = 125°C, θJA = 34°C/W, θJC = 1°C/WORDER PART NUMBERLTC3412EFELTC3412IFEFE PART MARKING3412EFE3412IFEORDER PART NUMBERLTC3412EUFOrder Options Tape and Reel: Add #TRLead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBFLead Free Part Marking: http://www.linear.com/leadfree/Consult LTC Marketing for parts specified with wider operating temperature ranges.The ● denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25°C. VIN = 3.3V unless otherwise specified.SYMBOLSVINVFBIFBΔVFBVLOADREGΔVPGOODRPGOODIQPARAMETERSignal Input Voltage RangeRegulated Feedback VoltageVoltage Feedback Leakage CurrentReference Voltage Line RegulationOutput Voltage Load RegulationPower Good RangePower Good Pull-Down ResistanceInput DC Bias CurrentActive CurrentSleepShutdownCONDITIONS(Note 3)VIN = 2.7V to 5.5V (Note 3)Measured in Servo Loop, VITH = 0.36VMeasured in Servo Loop, VITH = 0.84V●●●●ELECTRICAL CHARACTERISTICSMIN2.6250.784ITH VFBRT2

UWWWUF PART MARKING3412TYP0.8000.10.040.02–0.02±7.5120250620.02MAX5.50.8160.40.20.2–0.2±9200330801UNITSVVμA%/V%%%ΩμAμAμA3412fb(Note 4)VFB = 0.78V, VITH = 1VVFB = 1V, VITH = 0VVRUN = 0V, VMODE = 0V元器件交易网www.cecb2b.com

LTC3412The ● denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25°C. VIN = 3.3V unless otherwise specified.SYMBOLfOSCfSYNCRPFETRNFETILIMITVUVLOILSWVRUNIRUNPARAMETERSwitching FrequencySwitching Frequency RangeSYNC Capture RangeRDS(ON) of P-Channel FETRDS(ON) of N-Channel FETPeak Current LimitUndervoltage Lockout ThresholdSW Leakage CurrentRUN ThresholdRUN/SS Leakage CurrentCONDITIONSROSC = 309kΩ(Note 6)(Note 6)ISW = 1A (Note 7)ISW = –1A (Note 7)MIN0.880.30.3TYP0.95MAX1.144110902.62510.81UNITSMHzMHzMHzmΩmΩAVμAVμAELECTRICAL CHARACTERISTICS42.375VRUN = 0V, VIN = 5.5V0.585655.42.5000.10.65Note 1: Stresses beyond those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. Exposure to any AbsoluteMaximum Rating condition for extended periods may affect devicereliability and lifetime.Note 2: The LTC3412E is guaranteed to meet performance specificationsfrom 0°C to 85°C. Specifications over the –40°C to 85°C operatingtemperature range are assured by design, characterization and correlationwith statistical process controls. The LTC3412I is guaranteed to meetspecified performance over the –40°C to 85°C temperature range.Note 3: The LTC3412 is tested in a feedback loop that adjusts VFB toachieve a specified error amplifier output voltage (ITH).Note 4: Dynamic supply current is higher due to the internal gate chargebeing delivered at the switching frequency.Note 5: TJ is calculated from the ambient temperature TA and powerdissipation as follows: LTC3412: TJ = TA + PD (37.6°C/W).Note 6: 4MHz operation is guaranteed by design and not production tested.Note 7: Switch on resistance is guaranteed by design and test correlationin the UF package and by production test in the FE package.TYPICAL PERFOR A CE CHARACTERISTICSEfficiency vs Load Current1001009080Burst Mode OPERATION80EFFICIENCY (%)EFFICIENCY (%)60FORCED CONTINUOUS4060504030EFFICIENCY (%)20VIN = 3.3VVOUT = 2.5V0.010.11LOAD CURRENT (A)103412 G0100.001UWEfficiency vs Load Current10090VIN = 3.3VVIN = 5V807060504030VOUT = 2.5V1MHzBurst Mode OPERATION0.010.11LOAD CURRENT (A)103412 G02Efficiency vs Load Current70VIN = 3.3VVIN = 5V2010201000.00100.001VOUT = 2.5V1MHzFORCED CONTINUOUS0.010.11LOAD CURRENT (A)103412 G033412fb3

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LTC3412TYPICAL PERFOR A CE CHARACTERISTICSEfficiency vs Input Voltage98LOAD = 100mA96EFFICIENCY (%)EFFICIENCY (%)%ΔVOUT/VOUT94929088LOAD = 2.5ALOAD = 1A862.55VOUT = 2.5V1MHzBurst Mode OPERATION3.053.5.0.55INPUT VOLTAGE (V)5.053412 G04Burst Mode OperationVOUT100mV/DIVVOUT20mV/DIVIL1A/DIVIL200mA/DIV4μs/DIVVIN = 3.3V, VOUT = 2.5VLOAD = 50mA3412 G0720μs/DIVIL1A/DIVVOUT100mV/DIVStart-Up, Burst Mode Operation0.7960VOUT1V/DIV0.7955REFERENCE VOLTAGE (V)ON-RESISTANCE (mΩ)VRUN1V/DIVIL1A/DIV1ms/DIVVIN = 3.3V, VOUT = 2.5VLOAD = 1Ω4

UW3412 G10Efficiency vs Frequency9796959493920.47μH2.2μHVIN = 3.3VVOUT = 2.5VLOAD = 1ABurst Mode OPERATION800130018002300280033003800FREQUENCY (kHz)3412 G05Load Regulation0.020.00–0.02–0.04VIN = 3.3VVOUT = 2.5V1μH–0.06–0.08–0.10–0.12–0.14–0.16–0.1800.511.5LOAD CURRENT (A)22.53412 G0691300Load Step Transient ForcedContinuousLoad Step Transient Burst ModeOperation3412 G08VIN = 3.3V, VOUT = 2.5VLOAD STEP = NO LOAD TO 2.5A20μs/DIVVIN = 3.3V, VOUT = 2.5VLOAD STEP = 50mA TO 2.5A3412 G09Reference Voltagevs TemperatureVIN = 3.3V1201008060402001535557595115120TEMPERATURE (°C)3412 G11Switch On-Resistancevs Input Voltage0.79500.79450.79400.79350.79300.79250.7920–45–25–5PFET ON-RESISTANCENFET ON-RESISTANCE2.533.INPUT VOLTAGE (V)4.553412 G123412fb元器件交易网www.cecb2b.com

LTC3412TYPICAL PERFOR A CE CHARACTERISTICSSwitch On-Resistancevs Temperature120110100ON-RESISTANCE (mΩ)VIN = 3.3VFREQUENCY (kHz)90807060504030LEAKAGE CURRENT (nA)PFET ON-RESISTANCENFET ON-RESISTANCE20–40–20020406080TEMPERATURE (°C)Frequency vs Input Voltage10501040FREQUENCY (kHz)R = 309k10301020101010009902.5FREQUENCY (kHz)1004100210009996994992DC SUPPLY CURRENT (μA)33.4.5INPUT VOLTAGE (V)DC Supply Current vs Temperature300SUPPLY CURRENT (μA)ACTIVEMINIMUM PEAK INDUCTOR CURRENT (mA)350VIN = 3.3V2500200015001000500000.10.20.30.40.50.60.70.80.9BURST CLAMP VOLTAGE (V)1CURRENT LIMIT (A)250200150100SLEEP500–40–20020406080TEMPERATURE (°C)UW3412 G13Switch Leakage vs Input Voltage2.50040002.035003000250020001500100050055.53412 G14Frequency vs ROSCVIN = 3.3V1.51.0SYNCHRONOUS SWITCHMAIN SWITCH0.510012002.533.4.5INPUT VOLTAGE (V)050150250350450550650750850950ROSC (kΩ)3412 G15Switching Frequencyvs Temperature101010081006VIN = 3.3V300250200150100350DC Supply Currentvs Input VoltageACTIVESLEEP020406080TEMPERATURE (°C)1001203412 G1755.53412 G16990–40–20502.533.4.5INPUT VOLTAGE (V)55.53412 G18Minimum Peak Inductor Currentvs Burst Clamp Voltage400035003000VIN = 3.3VCurrent Limit vs Input Voltage6.86.66.46.26.05.85.65.42.751001203412 G193.2.7.253.75INPUT VOLTAGE (V)5.253412 G213412 G203412fb5

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LTC3412PI FUCTIOSSVIN (Pin 1/Pin 11): Signal Input Supply. Decouple thispin to SGND with a capacitor. Normally SVIN is equal toPVIN. SVIN can be greater than PVIN but keep the voltagedifference between SVIN and PVIN less than 0.5V.PGOOD (Pin 2/Pin 12): Power Good Output. Open-drainlogic output that is pulled to ground when the outputvoltage is not within ±7.5% of regulation point.ITH (Pin 3/Pin 13): Error Amplifier Compensation Point.The current comparator threshold increases with thiscontrol voltage. Nominal voltage range for this pin is from0.2V to 1.4V with 0.2V corresponding to the zero-sensevoltage (zero current).VFB (Pin 4/Pin 14): Feedback Pin. Receives the feedbackvoltage from a resistive divider connected across theoutput.RT (Pin 5/Pin 15): Oscillator Resistor Input. Connecting aresistor to ground from this pin sets the switching fre-quency.SYNC/MODE (Pin 6/Pin 16): Mode Select and ExternalClock Synchronization Input. To select forced continuous,tie to SVIN. Connecting this pin to a voltage between 0V and1V selects Burst Mode operation with the burst clamp setto the pin voltage.6

UUU(FE/UH Package)RUN/SS (Pin 7/Pin 1): Run Control and Soft-Start Input.Forcing this pin below 0.5V shuts down the LTC3412. Inshutdown all functions are disabled drawing < 1μA ofsupply current. A capacitor to ground from this pin sets theramp time to full output current.SGND (Pin 8/Pin 2): Signal Ground. All small-signalcomponents, compensation components and the exposedpad on the bottom side of the IC should connect to thisground, which in turn connects to PGND at one point.PVIN (Pins 9, 16/Pins 3, 10): Power Input Supply. Decouplethis pin to PGND with a capacitor.SW (Pins 10, 11, 14, 15/Pins 4, 5, 8, 9): Switch NodeConnection to the Inductor. This pin connects to the drainsof the internal main and synchronous power MOSFETswitches.PGND (Pins 12, 13/Pins 6, 7): Power Ground. Connectthis pin close to the (–) terminal of CIN and COUT.Exposed Pad (Pin 17/Pin 17): Signal Ground. Must besoldered to PCB for electrical connection and thermalperformance.3412fb

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LTC3412WFUCTIOAL BLOCK DIAGRA UUSVIN1SGND8ITH3PVIN916VOLTAGEREFERENCE0.8VSLOPECOMPENSATIONRECOVERYBCLAMPPMOS CURRENTCOMPARATOR+–P-CH+–VFB4–+–+ERRORAMPLIFIERSYNC/MODE0.74V+–+BURSTCOMPARATOR10SLOPECOMPENSATION11SW1415OSCILLATORRUN/SS7RUN0.86VN-CH–LOGIC+––+PGOOD2NMOSCURRENTCOMPARATORREVERSECURRENTCOMPARATOR5RT6SYNC/MODE12133412 FBDPGNDUOPERATIOMain Control LoopThe LTC3412 is a monolithic, constant-frequency, currentmode step-down DC/DC converter. During normal opera-tion, the internal top power switch (P-channel MOSFET) isturned on at the beginning of each clock cycle. Current inthe inductor increases until the current comparator tripsand turns off the top power MOSFET. The peak inductorcurrent at which the current comparator shuts off the toppower switch is controlled by the voltage on the ITH pin.The error amplifier adjusts the voltage on the ITH pin bycomparing the feedback signal from a resistor divider onthe VFB pin with an internal 0.8V reference. When the loadcurrent increases, it causes a reduction in the feedbackvoltage relative to the reference. The error amplifier raisesthe ITH voltage until the average inductor current matchesthe new load current. When the top power MOSFET shutsoff, the synchronous power switch (N-channel MOSFET)turns on until either the bottom current limit is reached orthe beginning of the next clock cycle. The bottom currentlimit is set at –2A for forced continuous mode and 0A forBurst Mode operation.The operating frequency is set by an external resistorconnected between the RT pin and ground. The practicalswitching frequency can range from 300kHz to 4MHz.3412fb7

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LTC3412UOPERATIOOvervoltage and undervoltage comparators will pull thePGOOD output low if the output voltage comes out ofregulation by ±7.5%. In an overvoltage condition, the toppower MOSFET is turned off and the bottom power MOS-FET is switched on until either the overvoltage conditionclears or the bottom MOSFET’s current limit is reached.Forced Continuous ModeConnecting the SYNC/MODE pin to SVIN will disable BurstMode operation and force continuous current operation.At light loads, forced continuous mode operation is lessefficient than Burst Mode operation but may be desirablein some applications where it is necessary to keep switch-ing harmonics out of a signal band. The output voltageripple is minimized in this mode.Burst Mode OperationConnecting the SYNC/MODE pin to a voltage between 0Vto 1V enables Burst Mode operation. In Burst Modeoperation, the internal power MOSFETs operate intermit-tently at light loads. This increases efficiency by minimiz-ing switching losses. During Burst Mode operation, theminimum peak inductor current is externally set by thevoltage on the SYNC/MODE pin and the voltage on the ITHpin is monitored by the burst comparator to determinewhen sleep mode is enabled and disabled. When theaverage inductor current is greater than the load current,the voltage on the ITH pin drops. As the ITH voltage fallsbelow 150mV, the burst comparator trips and enablessleep mode. During sleep mode, the top MOSFET is heldoff and the ITH pin is disconnected from the output of theerror amplifier. The majority of the internal circuitry is alsoturned off to reduce the quiescent current to 62μA whilethe load current is solely supplied by the output capacitor.When the output voltage drops, the ITH pin is reconnectedto the output of the error amplifier and the top powerMOSFET along with all the internal circuitry is switchedback on. This process repeats at a rate that is dependenton the load demand.Pulse skipping operation can be implemented by connect-ing the SYNC/MODE pin to ground. This forces the burstclamp level to be at 0V. As the load current decreases, thepeak inductor current will be determined by the voltage onthe ITH pin until the ITH voltage drops below 200mV. At thispoint, the peak inductor current is determined by theminimum on-time of the current comparator. If the loaddemand is less than the average of the minimum on-timeinductor current, switching cycles will be skipped to keepthe output voltage in regulation.Frequency SynchronizationThe internal oscillator of the LTC3412 can be synchronizedto an external clock connected to the SYNC/MODE pin. Thefrequency of the external clock can be in the range of300kHz to 4MHz. For this application, the oscillator timingresistor should be chosen to correspond to a frequencythat is 25% lower than the synchronization frequency.During synchronization, the burst clamp is set to 0V andeach switching cycle begins at the falling edge of theexternal clock signal.Dropout OperationWhen the input supply voltage decreases toward theoutput voltage, the duty cycle increases toward the maxi-mum on-time. Further reduction of the supply voltageforces the main switch to remain on for more than onecycle eventually reaching 100% duty cycle. The outputvoltage will then be determined by the input voltage minusthe voltage drop across the internal P-channel MOSFETand the inductor.Low Supply OperationThe LTC3412 is designed to operate down to an inputsupply voltage of 2.625V. One important consideration atlow input supply voltages is that the RDS(ON) of the P-channel and N-channel power switches increases. Theuser should calculate the power dissipation when theLTC3412 is used at 100% duty cycle with low inputvoltages to ensure that thermal limits are not exceeded.Slope Compensation and Inductor Peak CurrentSlope compensation provides stability in constant fre-quency architectures by preventing subharmonic oscilla-tions at duty cycles greater than 50%. It is accomplished3412fb

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LTC3412UOPERATIOinternally by adding a compensating ramp to the inductorcurrent signal at duty cycles in excess of 40%. Normally,the maximum inductor peak current is reduced whenslope compensation is added. In the LTC3412, however,slope compensation recovery is implemented to keep themaximum inductor peak current constant throughout therange of duty cycles. This keeps the maximum outputcurrent relatively constant regardless of duty cycle.Short-Circuit ProtectionWhen the output is shorted to ground, the inductor currentdecays very slowly during a single switching cycle. Toprevent current runaway from occurring, a secondarycurrent limit is imposed on the inductor current. If theinductor valley current increases larger than 4.8A, the toppower MOSFET will be held off and switching cycles will beskipped until the inductor current falls to a safe level.APPLICATIOS IFORATIOThe basic LTC3412 application circuit is shown in Fig-ure1. External component selection is determined by themaximum load current and begins with the selection of theinductor value and operating frequency followed by CINand COUT.Operating FrequencySelection of the operating frequency is a tradeoff betweenefficiency and component size. High frequency operationallows the use of smaller inductor and capacitor values.Operation at lower frequencies improves efficiency byreducing internal gate charge and switching losses butrequires larger inductance values and/or capacitance tomaintain low output ripple voltage.The operating frequency of the LTC3412 is determined byan external resistor that is connected between the RT pinand ground. The value of the resistor sets the ramp currentthat is used to charge and discharge an internal timingcapacitor within the oscillator and can be calculated byusing the following equation:ROSC3.23•1011(Ω)−10kΩ=f(Hz)Although frequencies as high as 4MHz are possible, theminimum on-time of the LTC3412 imposes a minimumlimit on the operating duty cycle. The minimum on-time istypically 110ns. Therefore, the minimum duty cycle isequal to 100 • 110ns • f(Hz).UInductor SelectionFor a given input and output voltage, the inductor valueand operating frequency determine the ripple current. Theripple current ΔIL increases with higher VIN and decreaseswith higher inductance.⎤⎡V⎤⎡VΔIL=⎢OUT⎥⎢1−OUT⎥VIN⎦⎣fL⎦⎣WUUHaving a lower ripple current reduces the ESR losses inthe output capacitors and the output voltage ripple. High-est efficiency operation is achieved at low frequency withsmall ripple current. This, however, requires a largeinductor.A reasonable starting point for selecting the ripple currentis ΔIL = 0.4(IMAX). The largest ripple current occurs at thehighest VIN. To guarantee that the ripple current staysbelow a specified maximum, the inductor value should bechosen according to the following equation:⎛VOUT⎞L=⎜⎟⎝fΔIL(MAX)⎠⎛VOUT⎞⎜1−V⎟IN(MAX)⎠⎝The inductor value will also have an effect on Burst Modeoperation. The transition from low current operation beginswhen the peak inductor current falls below a level set by theburst clamp. Lower inductor values result in higher ripplecurrent which causes this to occur at lower load currents.This causes a dip in efficiency in the upper range of lowcurrent operation. In Burst Mode operation, lower induc-tance values will cause the burst frequency to increase.3412fb

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LTC3412APPLICATIOS IFORATIOInductor Core SelectionOnce the value for L is known, the type of inductor must beselected. High efficiency converters generally cannot af-ford the core loss found in low cost powdered iron cores,forcing the use of more expensive ferrite, mollypermalloy,or Kool Mμ® cores. Actual core loss is independent of coresize for a fixed inductor value but it is very dependent onthe inductance selected. As the inductance increases, corelosses decrease. Unfortunately, increased inductance re-quires more turns of wire and therefore copper losses willincrease.Ferrite designs have very low core losses and are preferredat high switching frequencies, so design goals can con-centrate on copper loss and preventing saturation. Ferritecore material saturates “hard,” which means that induc-tance collapses abruptly when the peak design current isexceeded. This results in an abrupt increase in inductorripple current and consequent output voltage ripple. Donot allow the core to saturate!Different core materials and shapes will change the size/current and price/current relationship of an inductor.Toroid or shielded pot cores in ferrite or permalloy mate-rials are small and don’t radiate energy but generally costmore than powdered iron core inductors with similarcharacteristics. The choice of which style inductor to usemainly depends on the price vs size requirements and anyradiated field/EMI requirements. New designs for surfacemount inductors are available from Coiltronics, Coilcraft,Toko and Sumida.CIN and COUT SelectionThe input capacitance, CIN, is needed to filter the trapezoi-dal current at the source of the top MOSFET. To preventlarge ripple voltage, a low ESR input capacitor sized for themaximum RMS current should be used. RMS current isgiven by:IRMS=IOUT(MAX)VOUTVINVIN−1VOUTThis formula has a maximum at VIN = 2VOUT, where IRMS= IOUT/2. This simple worst-case condition is commonlyused for design because even significant deviations do not10

Uoffer much relief. Note that ripple current ratings fromcapacitor manufacturers are often based on only 2000hours of life which makes it advisable to further derate thecapacitor, or choose a capacitor rated at a higher tempera-ture than required. Several capacitors may also be paral-leled to meet size or height requirements in the design.The selection of COUT is determined by the effective seriesresistance (ESR) that is required to minimize voltageripple and load step transients, as well as the amount ofbulk capacitance that is necessary to ensure that thecontrol loop is stable. Loop stability can be checked byviewing the load transient response as described in a latersection. The output ripple, ΔVOUT, is determined by:WUU⎛1⎞ΔVOUT≤ΔIL⎜ESR+⎟⎝8fCOUT⎠The output ripple is highest at maximum input voltagesince ΔIL increases with input voltage. Multiple capacitorsplaced in parallel may be needed to meet the ESR and RMScurrent handling requirements. Dry tantalum, special poly-mer, aluminum electrolytic and ceramic capacitors are allavailable in surface mount packages. Special polymercapacitors offer very low ESR but have lower capacitancedensity than other types. Tantalum capacitors have thehighest capacitance density but it is important to only usetypes that have been surge tested for use in switchingpower supplies. Aluminum electrolytic capacitors havesignificantly higher ESR but can be used in cost-sensitiveapplications provided that consideration is given to ripplecurrent ratings and long term reliability. Ceramic capaci-tors have excellent low ESR characteristics but can have ahigh voltage coefficient and audible piezoelectric effects.The high Q of ceramic capacitors with trace inductancecan also lead to significant ringing.Using Ceramic Input and Output CapacitorsHigher values, lower cost ceramic capacitors are nowbecoming available in smaller case sizes. Their high ripplecurrent, high voltage rating and low ESR make them idealfor switching regulator applications. However, care mustbe taken when these capacitors are used at the input andoutput. When a ceramic capacitor is used at the input and3412fb

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LTC3412APPLICATIOS IFORATIOthe power is supplied by a wall adapter through long wires,a load step at the output can induce ringing at the input,VIN. At best, this ringing can couple to the output and bemistaken as loop instability. At worst, a sudden inrush ofcurrent through the long wires can potentially cause avoltage spike at VIN large enough to damage the part.Output Voltage ProgrammingThe output voltage is set by an external resistive divideraccording to the following equation:⎛R2⎞VOUT=0.8V⎜1+⎟⎝R1⎠The resistive divider allows the VFB pin to sense a fractionof the output voltage as shown in Figure 2.VOUTR2VFBLTC3412SGND3412 F02R1Figure 2. Setting the Output VoltageBurst Clamp ProgrammingIf the voltage on the SYNC/MODE pin is less than VIN by 1V,Burst Mode operation is enabled. During Burst Modeoperation, the voltage on the SYNC/MODE pin determinesthe burst clamp level which sets the minimum peakinductor current, IBURST, for each switching cycle accord-ing to the following equation:⎛3.75A⎞IBURST=(VBURST−0.2V)⎜⎟⎝0.8V⎠VBURST is the voltage on the SYNC/MODE pin. IBURST canbe programmed in the range of 0A to 3.75A. For values ofVBURST greater than 1V, IBURST is set at 3.75A. For valuesof VBURST less than 0.2V, IBURST is set at 0A. As the outputload current drops, the peak inductor current decreases tokeep the output voltage in regulation. When the outputload current demands a peak inductor current that is lessthan IBURST, the burst clamp will force the peak inductorUcurrent to remain equal to IBURST regardless of furtherreductions in the load current. Since the average inductorcurrent is greater than the output load current, the voltageon the ITH pin will decrease. When the ITH voltage drops to150mV, sleep mode is enabled in which both powerMOSFETs are shut off along with most of the circuitry tominimize power consumption. All circuitry is turned backon and the power MOSFETs begin switching again whenthe output voltage drops out of regulation. The value forIBURST is determined by the desired amount of outputvoltage ripple. As the value of IBURST increases, the sleepperiod between pulses and the output voltage ripple in-crease. The burst clamp voltage, VBURST, can be set by aresistor divider from the VFB pin to the SGND pin as shownin Figure 1.Pulse skipping, which is a compromise between low out-put voltage ripple and efficiency, can be implemented byconnecting the SYNC/MODE pin to ground. This sets IBURSTto 0A. In this condition, the peak inductor current is limitedby the minimum on-time of the current comparator, andthe lowest output voltage ripple is achieved while still op-erating discontinuously. During very light output loads,pulse skipping allows only a few switching cycles to beskipped while maintaining the output voltage in regulation.Frequency SynchronizationThe LTC3412’s internal oscillator can be synchronized toan external clock signal. During synchronization, the topMOSFET turn-on is locked to the falling edge of theexternal frequency source. The synchronization frequencyrange is 300kHz to 4MHz. Synchronization only occurs ifthe external frequency is greater than the frequency set bythe external resistor. Because slope compensation isgenerated by the oscillator’s RC circuit, the external fre-quency should be set 25% higher than the frequency setby the external resistor to ensure that adequate slopecompensation is present.Soft-StartThe RUN/SS pin provides a means to shut down theLTC3412 as well as a timer for soft-start. Pulling theRUN/SS pin below 0.5V places the LTC3412 in a lowquiescent current shutdown state (IQ < 1μA).3412fbWUU11

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LTC3412APPLICATIOS IFORATIOThe LTC3412 contains an internal soft-start clamp thatgradually raises the clamp on ITH after the RUN/SS pin ispulled above 2V. The full current range becomes availableon ITH after 1024 switching cycles. If a longer soft-startperiod is desired, the clamp on ITH can be set externallywith a resistor and capacitor on the RUN/SS pin as shownin Figure 1. The soft-start duration can be calculated byusing the following formula:⎛VIN⎞tSS=RSSCSSln⎜⎟(Seconds)⎝VIN−1.8V⎠Efficiency ConsiderationsThe efficiency of a switching regulator is equal to theoutput power divided by the input power times 100%. It isoften useful to analyze individual losses to determine whatis limiting the efficiency and which change would producethe most improvement. Efficiency can be expressed as:Efficiency = 100% – (L1 + L2 + L3 + ...)where L1, L2, etc. are the individual losses as a percentageof input power.Although all dissipative elements in the circuit producelosses, two main sources usually account for most of thelosses: VIN quiescent current and I2R losses.The VIN quiescent current loss dominates the efficiencyloss at very low load currents whereas the I2R lossdominates the efficiency loss at medium to high loadcurrents. In a typical efficiency plot, the efficiency curve atvery low load currents can be misleading since the actualpower lost is of no consequence.1.The VIN quiescent current is due to two components:the DC bias current as given in the electrical characteristicsand the internal main switch and synchronous switch gatecharge currents. The gate charge current results fromswitching the gate capacitance of the internal powerMOSFET switches. Each time the gate is switched fromhigh to low to high again, a packet of charge dQ movesfrom VIN to ground. The resulting dQ/dt is the current outof VIN that is typically larger than the DC bias current. Incontinuous mode, IGATECHG=f(QT + QB) where QT and QBare the gate charges of the internal top and bottom12

Uswitches. Both the DC bias and gate charge losses areproportional to VIN and thus their effects will be morepronounced at higher supply voltages.2.I2R losses are calculated from the resistances of theinternal switches, RSW and external inductor RL. In con-tinuous mode the average output current flowing throughinductor L is “chopped” between the main switch and thesynchronous switch. Thus, the series resistance lookinginto the SW pin is a function of both top and bottomMOSFET RDS(ON) and the duty cycle (DC) as follows:RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)The RDS(ON) for both the top and bottom MOSFETs can beobtained from the Typical Performance Characteristicscurves. Thus, to obtain I2R losses, simply add RSW to RLand multiply the result by the square of the average outputcurrent.Other losses including CIN and COUT ESR dissipativelosses and inductor core losses generally account for lessthan 2% of the total loss.Thermal ConsiderationsIn most applications, the LTC3412 does not dissipatemuch heat due to its high efficiency. But, in applicationswhere the LTC3412 is running at high ambient tempera-ture with low supply voltage and high duty cycles, such asin dropout, the heat dissipated may exceed the maximumjunction temperature of the part. If the junction tempera-ture reaches approximately 150°C, both power switcheswill be turned off and the SW node will become highimpedance.To avoid the LTC3412 from exceeding the maximumjunction temperature, the user will need to do somethermal analysis. The goal of the thermal analysis is todetermine whether the power dissipated exceeds themaximum junction temperature of the part. The tempera-ture rise is given by:TR = (PD)(θJA)where PD is the power dissipated by the regulator and θJAis the thermal resistance from the junction of the die to theambient temperature.3412fb

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LTC3412APPLICATIOS IFORATIOThe junction temperature, TJ, is given by:TJ = TA + TRwhere TA is the ambient temperature.As an example, consider the LTC3412 in dropout at aninput voltage of 3.3V, a load current of 2.5A and anambient temperature of 70°C. From the typical perfor-mance graph of switch resistance, the RDS(ON) of the P-channel switch at 70°C is approximately 97mΩ. There-fore, power dissipated by the part is:PD = (ILOAD2)(RDS(ON)) = (2.5A)2(97mΩ) = 0.61WFor the TSSOP package, the θJA is 37.6°C/W. Thus thejunction temperature of the regulator is:TJ = 70°C + (0.61W)(37.6°C/W) = 93°Cwhich is below the maximum junction temperature of125°C.Note that at higher supply voltages, the junction tempera-ture is lower due to reduced switch resistance (RDS(ON)).Checking Transient ResponseThe regulator loop response can be checked by looking atthe load transient response. Switching regulators takeseveral cycles to respond to a step in load current. Whena load step occurs, VOUT immediately shifts by an amountequal to ΔILOAD(ESR), where ESR is the effective seriesresistance of COUT. ΔILOAD also begins to charge ordischarge COUT generating a feedback error signal used bythe regulator to return VOUT to its steady-state value.During this recovery time, VOUT can be monitored forovershoot or ringing that would indicate a stability prob-lem. The ITH pin external components and output capaci-tor shown in Figure 1 will provide adequate compensationfor most applications.Design ExampleAs a design example, consider using the LTC3412 in anapplication with the following specifications: VIN = 2.7V to4.2V, VOUT = 2.5V, IOUT(MAX) = 2.5A, IOUT(MIN) = 10mA, f= 1MHz. Because efficiency is important at both high andlow load current, Burst Mode operation will be utilized.UFirst, calculate the timing resistor:WUUROSC3.23•1011=−10k=313k1•106Use a standard value of 309k. Next, calculate the inductorvalue for about 40% ripple current at maximum VIN:⎛2.5V⎞⎛2.5V⎞L=⎜⎟=1.01μH⎟⎜1−⎝(1MHz)(1A)⎠⎝4.2V⎠Using a 1μH inductor, results in a maximum ripple currentof:⎛⎞2.5VΔIL=⎜⎟⎝(1MHz)(1μH)⎠⎛2.5V⎞⎜1−⎟=1.01A⎝4.2V⎠COUT will be selected based on the ESR that is required tosatisfy the output voltage ripple requirement and the bulkcapacitance needed for loop stability. In this application,two tantalum capacitors will be used to provide the bulkcapacitance and a ceramic capacitor in parallel to lower thetotal effective ESR. For this design, two 100μF tantalumcapacitors in parallel with a 10μF ceramic capacitor will beused. CIN should be sized for a maximum current rating of:⎛2.5V⎞4.2V−1=1.23ARMSIRMS=(2.5A)⎜⎟⎝4.2V⎠2.5VDecoupling the PVIN and SVIN pins with a 22μF ceramiccapacitor and a 220μF tantalum capacitor is adequate formost applications.The burst clamp and output voltage can now be pro-grammed by choosing the values of R1, R2 and R3. Thevoltage on the MODE pin will be set to 0.32V by the resistordivider consisting of R2 and R3. A burst clamp voltage of0.32V will set the minimum inductor current, IBURST, asfollows:⎛3.75V⎞

IBURST=(0.32V−0.2V)⎜⎟=563mA

⎝0.8V⎠

3412fb

13

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LTC3412APPLICATIOS IFORATIOIf we set the sum of R2 and R3 to 185k, then the followingequations can be solved:R2+R3=185kR20.8V1+=R30.32VThe last two equations shown result in the followingvalues for R2 and R3: R2 = 110k , R3 = 75k. The value ofR1 can now be determined by solving the equation shownbelow:1+R12.5V=185k0.8VR1=393kA value of 392k will be selected for R1. Figure 4 shows thecomplete schematic for this design example.PC Board Layout ChecklistWhen laying out the printed circuit board, the followingchecklist should be used to ensure proper operation of theLTC3412. Check the following in your layout.Top SideFigure 3. LTC3412 Layout Diagram14

U1.A ground plane is recommended. If a ground plane layeris not used, the signal and power grounds should besegregated with all small-signal components returning tothe SGND pin at one point which is then connected to thePGND pin close to the LTC3412. The exposed pad shouldbe connected to SGND.2.Connect the (+) terminal of the input capacitor(s), CIN,as close as possible to the PVIN pin. This capacitorprovides the AC current into the internal power MOSFETs.3.Keep the switching node, SW, away from all sensitivesmall-signal nodes.4.Flood all unused areas on all layers with copper. Flood-ing with copper will reduce the temperature rise of powercomponents. You can connect the copper areas to any DCnet (PVIN, SVIN, VOUT, PGND, SGND, or any other DC railin your system).5.Connect the VFB pin directly to the feedback resistors.The resistor divider must be connected between VOUT andSGND.Bottom Side3412fb

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LTC3412APPLICATIOS IFORATIOUCFB 22pF X5RR1 392kCIN1††220μFVIN2.7V TO 4.2V1RPG100kPGOODCITH 680pF X7RRITH7.15kCC100pF4R375kR2110kROSC 309k5SVINPGOODITHLTC3412PGNDVFBPGNDRTSWSWPVINPVINSWSW16231514131211109CIN222μFX5R 6.3V*TOKO D62CB A920CY-1ROM**SANYO POSCAP 4TPB100M†TAIYO YUDEN LMK325BJ106MN††SANYO POSCAP 2R5TPC220M3412 F04RSS4.7MFigure 4. Single Lithium-Ion to 2.5V, 2.5A Regulator at 1MHz, Burst Mode Operation Using POSCAPsWUU L1*1μHVOUT2.5V2.5ACOUT2†10μF6SYNC/MODE7RUNSGND+CSS470pF X7R8COUT1**100μF×2GND3412fb15

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LTC3412TYPICAL APPLICATIO S2.5V, 2.5A Regulator Using All Ceramic CapacitorsCIN3**100μFVIN2.7V TO 5.5VPGOODCITH 1000pF X7RRITH15kCC100pFR375kRSS4.7M*TOKO D62CB A920CY-1ROM**TDK C4532X5R0J107M1.8V, 2.5A Step-Down Regulator at 1MHz, Burst Mode OperationVIN3.3VR1 232kCIN1**22μFPGOODCITH 560pF X7RRITH10kC247pFR375kRSS4.7M*SUMIDA CR431R0**AVX 12066D226MAT3412fb16

UC1 22pF X5RR1 392kCIN122μFX5R 6.3V1RPG100kSVINPGOODITHLTC3412PVINSWSWPGND16231514131211109CIN222μFX5R 6.3V3412 F0R2110kROSC309k567CSS470pF X7R8VFBPGNDRTSWSYNC/MODERUNSGNDSWPVIN L1*1μHVOUT2.5V2.5ACOUT**100μFGNDC1 22pF X5R1RPG100kSVINPGOODITHLTC3412PVINSWSWPGND16231514131211109CIN2 22μF**L11μH*4R2110kROSC309k567CSS470pF X7R8VFBPGNDRTSWSYNC/MODERUNSGNDSWPVINVOUT1.8V2ACOUT**22μF×23412 TA05GND元器件交易网www.cecb2b.com

LTC3412TYPICAL APPLICATIO S2.5V, 2.5A Low Output Noise Regulator at 2MHzVIN3.3VCIN30.1μFX5RPGOODCITH 1000pF X7RRITH22.1kC156pFRSS4.7M*VISHAY DALE IHLP-2525CZ-01 0.47**TDK C4532X5R0J107MEFFICIENCY (%)URIN5ΩCFF 22pF X7RR1 392kCIN1**100μF1RPG100kSVINPGOODITHLTC3412PVINSWSWPGND16231514131211109CIN2 100μF**3412 TA0R2182kROSC137k567CSS470pF X7R8VFBPGNDRTSWSYNC/MODERUNSGNDSWPVINL10.47μH*VOUT2.5V2.5ACOUT**100μF×2GNDEfficiency vs Load Current2MHz, Low Noise10090807060504030201000.010.11LOAD CURRENT (A)103412 TA073412fb17

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LTC3412TYPICAL APPLICATIO S3.3V, 2.5A Step-Down Regulator at 1MHz, Forced Continuous Mode OperationCIN3**100μFVIN5VPGOODCITH 1000pF X7RRITH15kCC100pFR2200kROSC309k*PULSE P1166.162T**TDK C4532X5R0J107MLithium-Ion to 3.3V, Single Inductor Buck-Boost ConverterC122pFR1 576kCIN122μFX5R 6.3VGNDCIN3**100μF×2 VIN2.7V TO 4.2VPGOODCITH 1000pF X7RRITH15kC2100pF*TOKO D63CB**TDK C4532X5R0J107M18

UC1 22pF X5RR1 634kCIN122μFX5R 6.3V1RPG100kSVINPGOODITHLTC3412PVINSWSWPGND162341514131211109CIN222μFX5R 6.3V3412 TA01VFB567PGNDRTSWSYNC/MODERUNSGNDSWPVIN L1*1μHVOUT3.3V2.5ACOUT**100μFRSS4.7MCSS470pF X7R8GND1RPG100kSVINPGOODITHLTC3412PVINSWSWPGND16231514131211109CIN222μFX5R 6.3V3412 F044R375kRSS4.7MR2110kROSC309k567CSS470pF X7R8VFBPGNDRTSWSYNC/MODERUNSGNDSWPVIN L1*2μHD1DIODES, INC.B320AVOUT3.3VM1SILICONIXSi2302DSCOUT**100μFGNDVIN2.7V3V3.5V4.2VMAXIMUM IOUT800mA900mA1.05A1.2A3412fb元器件交易网www.cecb2b.com

LTC3412PACKAGE DESCRIPTIOUFE Package16-Lead Plastic TSSOP (4.4mm)(Reference LTC DWG # 05-08-1663)Exposed Pad Variation BA2.74(.108) 4.90 – 5.10*(.193 – .201)2.74(.108)1615141312111096.60 ±0.104.50 ±0.10SEE NOTE 42.74(.108)0.45 ±0.051.05 ±0.100.65 BSC2.746.40(.108)(.252)BSCRECOMMENDED SOLDER PAD LAYOUT123456781.10(.0433)MAX0° – 8° 4.30 – 4.50*(.169 – .177)0.25REF0.09 – 0.20(.0035 – .0079)0.50 – 0.75(.020 – .030)0.65(.0256)BSC NOTE:1. CONTROLLING DIMENSION: MILLIMETERSMILLIMETERS2. DIMENSIONS ARE IN(INCHES)3. DRAWING NOT TO SCALE0.195 – 0.30(.0077 – .0118)TYP0.05 – 0.15(.002 – .006)FE16 (BA) TSSOP 02044. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006\") PER SIDEUF Package16-Lead Plastic QFN (4mm × 4mm)(Reference LTC DWG # 05-08-1692)BOTTOM VIEW—EXPOSED PAD4.00 ± 0.10(4 SIDES)0.72 ±0.05PIN 1TOP MARK(NOTE 6)2.15 ± 0.10(4-SIDES)0.75 ± 0.05R = 0.115TYPPIN 1 NOTCH R = 0.20 TYPOR 0.35 × 45° CHAMFER15160.55 ± 0.20124.35 ± 0.052.90 ± 0.052.15 ± 0.05(4 SIDES)PACKAGEOUTLINE0.30 ±0.050.65 BSCRECOMMENDED SOLDER PAD PITCH AND DIMENSIONSNOTE:1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)2. DRAWING NOT TO SCALE3. ALL DIMENSIONS ARE IN MILLIMETERS4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE0.200 REF0.00 – 0.05(UF16) QFN 10040.30 ± 0.050.65 BSC5. EXPOSED PAD SHALL BE SOLDER PLATED6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3412fbInformation furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.19

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LTC3412TYPICAL APPLICATIO2.5V, 2.5A Step-Down Regulator Synchronized to 1.25MHzVIN2.7V TO 5.5VPGOODCITH 1000pF X7RRITH15kCC 100pFRTROSC 309k1.25MHz6SYNC/MODERSSEXT CLOCK74.7MRUNCSS470pF X7R8SGND*TOKO D62CB A920CY-1ROM**TDK C4532X5R0J107MRELATED PARTSPART NUMBERLTC1701/LTC1701BLTC1772/LTC1772BLTC1773LTC1875LTC1877LTC1878LTC1879LTC3404LTC3405ALTC3406/LTC3406BLTC3411DESCRIPTION700mA (IOUT), 1MHz Step-Down ConverterConstant 550kHz Current Mode Step-Down DC/DC ControllerConstant Frequency 550kHz Step-Down DC/DC Controller1.5A (IOUT), 500kHz Synchronous Step-Down Converter600mA (IOUT), 500kHz Synchronous Step-Down Converter600mA (IOUT), 550kHz Synchronous Step-Down Converter1.2A (IOUT), 550kHz Synchronous Step-Down Converter600mA (IOUT), 1.4MHz Synchronous Step-Down Converter300mA (IOUT), 1.5MHz Synchronous Step-Down Converter600mA (IOUT), 1.5MHz Synchronous Step-Down Converter1.25A (IOUT), 4MHz Synchronous Step-Down ConverterCOMMENTSVIN = 2.5V to 5V, B Version: Burst Mode Defeat, ThinSOTTMVIN = 2.5V to 9.8V, 94% Efficiency, 100% Duty Cycle, ThinSOTVIN = 2.65V to 8.5V, 95% Efficiency, VOUT from 0.8V to VIN,MSOP-10VIN = 2.65V to 6V, 95% Efficiency, PLL, SSOP-16VIN = 2.65V to 10V, 95% Efficiency, MSOP-8VIN = 2.65V to 6V, 95% Efficiency, MSOP-8VIN = 2.65V to 10V, 95% Efficiency, SSOP-16VIN = 2.65V to 6V, 95% Efficiency, MSOP-8VIN = 2.65V to 6V, 96% Efficiency, ThinSOT PackageVIN = 2.5V to 5.5V, 95% Efficiency, ThinSOT,B Version: Burst Mode DefeatVIN = 2.5V to 5.5V, 95% Efficiency, MSOP-10ThinSOT is a trademark of Linear Technology Corporation.20

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(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.comUC1 22pF X5RR1 392kCIN122μFX5R 6.3VCIN3**100μF1RPG100kSVINPGOODITHLTC34124R2 182k5PGNDVFBPGNDSWSWPVINPVINSWSW16231514131211109CIN222μFX5R 6.3V3412 TA02 L1*1μHVOUT2.5V2.5ACOUT1**100μFGND3412fbLT 0707 REV B • PRINTED IN USA

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